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1

Statistical analysis of hold time violations

Lucas Brusamarello, Gustavo Neuberger, Gilson I. Wirth, Roberto da Silva, Ricardo Reis, Rajeev Murgai, Subodh Reddy, William Walker

Journal:

Journal of Computational Electronics

Year:

2010

Language:

english

File:

PDF, 745 KB

english, 2010

2

[IEEE 2007 25th International Conference on Computer Design ICCD 2007 - Lake Tahoe, CA, USA (2007.10.7-2007.10.10)] 2007 25th International Conference on Computer Design - Fast power network analysis with multiple clock domains

Wanping Zhang,, Ling Zhang,, Rui Shi,, He Peng,, Zhi Zhu,, Lew Chua-Eoan,, Rajeev Murgai,, Toshiyuki Shibuya,, Nuriyoki Ito,, Chung-Kuan Cheng,

Year:

2007

Language:

english

File:

PDF, 536 KB

english, 2007

3

[IEEE 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - Bangalore, India (2007.01.6-2007.01.10)] 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) - An Efficient Uncertainty- and Skew-aware Methodology for Clock Tree Synthesis and Analysis

Wason, Vineet, Murgai, Rajeev, Walker, William

Year:

2007

Language:

english

File:

PDF, 456 KB

english, 2007

4

[IEEE 2008 Design, Automation and Test in Europe - Munich, Germany (2008.03.10-2008.03.14)] 2008 Design, Automation and Test in Europe - Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network

Zhang, Wanping, Zhu, Yi, Yu, Wenjian, Zhang, Ling, Shi, Rui, Peng, He, Zhu, Zhi, Chua-Eoan, Lew, Murgai, Rajeev, Shibuya, Toshiyuki, Ito, Nuriyoki, Cheng, Chung-Kuan

Year:

2008

Language:

english

File:

PDF, 243 KB

english, 2008

5

[IEEE 8th International Symposium on Quality Electronic Design (ISQED'07) - San Jose, CA, USA (2007.03.26-2007.03.28)] 8th International Symposium on Quality Electronic Design (ISQED'07) - Design and Analysis of "Tree+Local Meshes" Clock Architecture

Wilke, Gustavo R., Murgai, Rajeev

Year:

2007

Language:

english

File:

PDF, 554 KB

english, 2007

6

[ACM Press Conference proceedings - Orlando, Florida, United States (1990.06.24-1990.06.27)] Conference proceedings on 27th ACM/IEEE design automation conference - DAC '90 - Logic synthesis for programmable gate arrays

Murgai, Rajeev, Nishizaki, Yoshihito, Shenoy, Narendra, Brayton, Robert K., Sangiovanni-Vincentelli, Alberto

Year:

1990

Language:

english

File:

PDF, 893 KB

english, 1990

7

[ACM Press the 35th annual conference - San Francisco, California, United States (1998.06.15-1998.06.19)] Proceedings of the 35th annual conference on Design automation conference - DAC '98 - Using complementation and resequencing to minimize transitions

Murgai, Rajeev, Fujita, Masahiro, Oliveira, Arlindo

Year:

1998

Language:

english

File:

PDF, 172 KB

english, 1998

8

[ACM Press the conference - Munich, Germany (1999..-..)] Proceedings of the conference on Design, automation and test in Europe - DATE '99 - On reducing transitions through data modifications

Murgai, Rajeev, Fujita, Masahiro

Year:

1999

Language:

english

File:

PDF, 199 KB

english, 1999

9

[ACM Press the 2001 conference - Yokohama, Japan (2001..-..)] Proceedings of the 2001 conference on Asia South Pacific design automation - ASP-DAC '01 - Efficient global fanout optimization algorithms

Year:

2001

File:

PDF, 211 KB

2001

10

[ACM Press the 30th international - Dallas, Texas, United States (1993.06.14-1993.06.18)] Proceedings of the 30th international on Design automation conference - DAC '93 - Sequential synthesis for table look up programmable gate arrays

Murgai, Rajeev, Brayton, Robert K., Sangiovanni-Vincentelli, Albert

Year:

1993

Language:

english

File:

PDF, 768 KB

english, 1993

11

[ACM Press the 31st annual conference - San Diego, California, United States (1994.06.06-1994.06.10)] Proceedings of the 31st annual conference on Design automation conference - DAC '94 - Optimum functional decomposition using encoding

Murgai, Rajeev, Brayton, Robert K., Sangiovanni-Vincentelli, Alberto

Year:

1994

Language:

english

File:

PDF, 204 KB

english, 1994

12

[ACM Press the conference - Munich, Germany (2008.03.10-2008.03.14)] Proceedings of the conference on Design, automation and test in Europe - DATE '08 - Finding the worst voltage violation in multi-domain clock gated power network

Zhang, Wanping, Shibuya, Toshiyuki, Ito, Nuriyoki, Cheng, Chung-Kuan, Zhu, Yi, Yu, Wenjian, Zhang, Ling, Shi, Rui, Peng, He, Zhu, Zhi, Chua-Eoan, Lew, Murgai, Rajeev

Year:

2008

Language:

english

File:

PDF, 212 KB

english, 2008

13

Technology-Dependent Logic Optimization

Journal:

Proceedings of the IEEE

Year:

2015

Language:

english

File:

PDF, 1.16 MB

english, 2015